At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
- 20+ years of experience in digital IC implementation including floorplan, power-plan, placement, CTS, routing, SI & STA signoff.
- Hands-on experience on running advanced process below with hierarchical, timing driven, SI prevention, low power place-and-route projects a big plus
- Familiar with SOC-E, STA (ETS or PrimeTime-SI), RC extraction, LEF generation with Abstract generator
- Knowledge of Linux and tcl is a must - Good program / engagement management skill
- Effective team player, willing to learn - Good command of English (written or oral)
We’re doing work that matters. Help us solve what others can’t.
Seen 24 days ago.
Original posting on Cadence Design Systems's site ↗
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