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Open nowPosted 3 days ago

Lead Verification Engineer

8allocate9 open roles

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Your applicationOpen nowLead Verification Engineer8allocate · Remote
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11.5% of postings close within 7 days. Measured by our own scanner across the market.

Share of postings closed within
  1. 2.1%1 day
  2. 4.4%3 days
  3. 11.5%7 days
  4. 18.1%14 days
  5. 35.6%30 days
  6. 44.6%60 days
This job: posted 3 days ago

The posting

About the client:

The client is an international engineering services company specializing in semiconductor design and verification. They support technology companies throughout the chip development lifecycle, from architecture and IP design to verification and physical implementation. Their expertise covers ASIC and FPGA projects across artificial intelligence, networking, automotive, and image processing.

About the project:

We are looking for a Verification Team Leader to lead a team working on SoC and IP-level projects of varying complexity. This role combines hands-on verification work with technical leadership, task coordination, and mentoring in a supportive and collaborative environment.

Requirements:

  • Strong hands-on experience in design verification using SystemVerilog and UVM;
  • B.Sc. or M.Sc. in Electrical Engineering;
  • Experience applying verification concepts and methodologies to real projects;
  • Experience leading verification activities and providing technical guidance to engineers;
  • Ability to translate design specifications into verification plans and tasks;
  • Strong analytical and debugging skills;
  • Ability to coordinate priorities, track progress, and communicate technical challenges;
  • Experience mentoring engineers and reviewing their technical work.

Responsibilities:

  • Lead and coordinate the team’s functional verification activities at the IP and SoC levels;
  • Contribute to verification planning and define the technical approach together with project stakeholders;
  • Develop and maintain verification environments and test scenarios using SystemVerilog and UVM;
  • Allocate tasks, monitor progress, and support timely delivery;
  • Review verification plans, test scenarios, and results;
  • Support engineers in investigating simulation failures and resolving complex verification issues;
  • Collaborate with design engineers to clarify specifications and resolve defects;
  • Monitor verification coverage and guide the team in addressing gaps;
  • Mentor team members and share verification practices;
  • Communicate progress, risks, and technical dependencies to project stakeholders.

Benefits from 8allocate:

  • Team & Culture: Team events, offsites, and a culture that keeps people connected.
  • Learning & Development: Budget for courses, certifications, and conferences.
  • Wellbeing: Flexible support in line with company policy, with options to support your physical and mental wellbeing (sport, mental health, or medical insurance).
  • Rest & Recovery: Paid vacation and sick leave.
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