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Open nowPosted 10 hours ago

Packaging Engineer

AMD1,293 open roles

Where
Hsinchu, Taiwan
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Your applicationOpen nowPackaging EngineerAMD · Hsinchu, Taiwan

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The clock on this job

Early applications get read.

13.8% of postings close within 7 days. Measured by our own scanner across the market. AMD postings stay open a median of 49 days.

Share of postings closed within
  1. 2.2%1 day
  2. 4.7%3 days
  3. 13.8%7 days
  4. 22.3%14 days
  5. 37.8%30 days
  6. 59.0%60 days
This job: posted 10 hours ago

AMD median: 49 days open

The posting

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.

Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career.

THE ROLE:

The candidate will work closely with OSATs and cross-functional teams to bring up and sustain InFO, EFB/CoWoS-L, CoWoS-S, WLFO, FCBGA, LGA, and chiplet packages.

THE PERSON:

The ideal candidate combines strong technical knowledge with program management experience across InFO, EFB/CoWoS-L, CoWoS-S, WLFO, FCBGA, LGA, and chiplet package functions.

The successful candidate is a committed team player who consistently meets deadlines, leads and drives solutions, and thrives in a fast-paced, multi-tasking environment. He or she brings excellent cross-functional project management skills, strong interpersonal skills, effective communication and presentation skills, and a good command of both written and spoken English.

KEY RESPONSIBILITIES:

  • Own manufacturing readiness for new product bring-up of InFO, EFB/CoWoS-L, CoWoS, WLFO, FCBGA, LGA, and chiplet packages at the manufacturing site.
  • Own packaging yield, quality, cost, and operational productivity improvements, as well as sustaining activities.
  • Drive assembly process baseline standardization and continuous improvement.
  • Own packaging interaction activities across assembly, bump, 3D IC, HBM, wafer fab, wafer sort, functional test, and mark/pack.
  • Drive the assembly manufacturer to enhance process, equipment, and material capability for future-generation technologies and products.
  • Partner with the Packaging BU on NPI and ramp-up readiness at the manufacturing site; proactively follow up on task assignments and report status to stakeholders in a timely manner.
  • Manage the performance of assembly manufacturing sites and suppliers on yield and quality, out-of-control lot disposition, and outliers, with closed-loop reporting.
  • Work with internal engineering counterparts and extensively across the Package Engineering organization, as well as other internal organizations (procurement, supply chain, reliability, etc.), on program deliverables, providing accurate and timely status reports and executive summary updates throughout the program life cycle.
  • Lead strategic supplier management.
  • Plan and execute change management for changes initiated internally or by external parties.
  • Perform other duties as assigned by the

PREFERRED EXPERIENCE:

  • 6-7 years of experience in InFO,5D/3D bump/TSV/packaging, flip chip BGA/LGA, or WLFO process engineering, or assembly experience.
  • Knowledge of InFO, chiplet packaging, 2.5D/3D TSV/packaging, and flip chip BGA/LGA processes, as well as chip-package interaction.
  • Experience leading and managing teams.
  • Experience in strategic supplier management.
  • Familiarity with DOE and JMP.
  • MS degree in Mechanical, Materials, or Chemical Engineering.
  • Creative, highly motivated, self-driven team player with a demonstrated ability to complete complex engineering tasks independently and on or ahead of schedule, lead and drive solutions, and thrive in a fast-paced, multi-tasking environment.
  • Experience preparing reports and presentations and communicating root cause and resolution
  • Strong interpersonal, analytical, project management, and time management skills, with excellent communication skills.
  • Experience managing horizontally across multiple internal functional organizations.
  • Experience in a semiconductor engineering environment, with NPI-to-HVM experience.
  • Fluent in both spoken and written English.

ACADEMIC CREDENTIALS:

  • Bachelor's or MS degree in Mechanical, Materials, or Chemical Engineering.

LOCATION:

Hsinchu, Taiwan

#LI-SH1

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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