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Open nowPosted today

FE Engineer

Apple6,366 open roles

Where
Austin, United States of America
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Your applicationOpen nowFE EngineerApple · Austin, United States of America

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The clock on this job

Early applications get read.

13.4% of postings close within 7 days. Measured by our own scanner across the market. Apple postings stay open a median of 41 days.

Share of postings closed within
  1. 2.2%1 day
  2. 4.6%3 days
  3. 13.4%7 days
  4. 21.6%14 days
  5. 36.2%30 days
  6. 59.0%60 days
This job: posted today

Apple median: 41 days open

The posting

Summary

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

Description

APPLE INC has the following available in Austin, Texas. Work closely with Architecture to understand performance goals of the design. Correlate RTL performance against model performance. Perform deep performance analysis in the design and report findings. Identify performance bottlenecks in design and coordinate with Architecture team to improve performance. Define performance statistics to help performance debug and standard methodologies to improve performance correlation effort. Have strong interpersonal skills, work independently & lead work you are doing to align with the project goals plus support multi-functional engineering efforts. 40 hours/week.

Minimum Qualifications

Bachelor's degree or foreign equivalent in Computer Engineering, Electrical Engineering or related field.

Experience and/or education must include:

Understanding Computer Architecture (to include Cache behavior, and basic CPU operations ) to analyze Performance in complex SoC. Reading and writing Verilog, System Verilog coding to develop or modify UVM testbench Utilizing Python/Perl scripting skills to analyze data and interpret large datasets, including experience in automation, and experience creating custom reporting and internal tools. Lead collaborations between Design, DV and Architecture stakeholders to implement test plans and debug performance shortfalls. Utilizing Excel and CSV file creation and data generation for Data Visualization. Understanding of SoC Fabric/Interconnect design and tradeoffs to optimize for Bandwidth and/or Latency as well as Quality-of-Service metrics. Utilizing engineering and problem solving skills to work with other Engineers to design multiple experiments to isolate issues. Debugging Waveforms using Verdi/Indago to analyze cycle-by-cycle operations of complex state machines.

Preferred Qualifications

N/A

LMT Footer

This position is not subject to the application limits.

EEO Statement

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

Accessibility

At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.

Learn about accessibility in Apple’s workplace

Learn about reasonable accommodations for job applicants

Application Deadline

Apple accepts applications to this posting on an ongoing basis.

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