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Open nowPosted 3 days ago

Senior Principal Engineer- Field Applications

Astera Labs178 open roles

Pay
$205,000 – $260,000 a year
Where
San Jose, California, United States
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Your applicationOpen nowSenior Principal Engineer- Field ApplicationsAstera Labs · San Jose, California, United States

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The clock on this job

Early applications get read.

12.1% of postings close within 7 days. Measured by our own scanner across the market. Astera Labs postings stay open a median of 48 days.

Share of postings closed within
  1. 2.1%1 day
  2. 4.5%3 days
  3. 12.1%7 days
  4. 19.1%14 days
  5. 35.6%30 days
  6. 52.7%60 days
This job: posted 3 days ago

Astera Labs median: 48 days open

The posting

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.

Role Overview

As a (Sr.) Principal Engineer - Field Applications Engineering, you will serve as a trusted technical partner to customers deploying Astera Labs’ high-speed connectivity solutions. You will lead the continuation of critical customer support for Ethernet and PCIe products, translating system requirements into reliable, production-ready designs and accelerating issue resolution across complex AI infrastructure platforms.

Based onsite in San Jose, you will work closely with customers and cross-functional teams across sales, product management, design engineering, validation, and operations. Your expertise in high-speed interfaces, physical-layer behavior, and system-level integration will help customers bring next-generation rack-scale AI architectures to market with confidence.

Key Responsibilities

  • Customer Technical Leadership Lead technical engagements with strategic customers from architecture definition through deployment and production support. Own customer escalations, establish clear action plans, and drive issues to timely closure with measurable outcomes. Present design recommendations, bring-up results, and technical tradeoffs to customer engineering and leadership teams.
  • Ethernet and PCIe Product Support Develop and execute system-level debug plans for Ethernet and PCIe connectivity issues, including link training, interoperability, compliance, and performance. Analyze physical-layer behavior, signal-integrity symptoms, error logs, lab data, and system telemetry to isolate root causes. Partner with engineering teams to reproduce field issues, influence product improvements, and communicate effective workarounds or corrective actions.
  • Cross-Functional Enablement Collaborate with sales and product management to capture customer requirements and shape application strategies for emerging AI infrastructure designs. Create technical collateral, reference architectures, application notes, and enablement materials for customers and internal teams. Mentor Field Applications Engineers and contribute to scalable processes for customer onboarding, issue tracking, and product adoption.

Basic Qualifications

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related technical field.
  • 8–20 years of experience in field applications engineering, system engineering, product engineering, or a related domain.
  • Deep hands-on experience with Ethernet and/or PCIe systems, high-speed SerDes, link training, interoperability, and compliance.
  • Strong understanding of physical-layer concepts, signal integrity, board-level bring-up, lab instrumentation, and system-level debug.
  • Demonstrated ability to lead complex customer escalations, debug, and communicate technical concepts clearly to diverse audiences.
  • Ability to work onsite in San Jose and travel to customer and partner locations as needed.

Preferred Qualifications

  • Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • Experience with PCIe Gen 5/6/7, high-speed Ethernet, retimers, redrivers, signal-conditioning and scale-up, scale-out solutions.
  • Familiarity with server, accelerator, switch, NIC, storage, or other data-center platform architectures.
  • Experience developing reference designs, validation plans, interoperability strategies, or customer-facing technical documentation.
  • Proven record of influencing cross-functional teams and mentoring technical professionals in a fast-moving, high-growth environment.

Salary range is $205,000 to $260,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

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