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Open nowPosted 7 hours ago

Senior Electrical Hardware Engineer (PCB Design - High-Speed Boards)

Atheer ACT

Where
Hsinchu, Hsinchu City, Taiwan
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Your applicationOpen nowSenior Electrical Hardware Engineer (PCB Design - High-Speed Boards)Atheer ACT · Hsinchu, Hsinchu City, Taiwan

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  3. 25 readersRecruiter, hiring manager, skeptic. Round after round.

  4. CV RocketApplied on Atheer ACT's own form.

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The clock on this job

Early applications get read.

13.3% of postings close within 7 days. Measured by our own scanner across the market.

Share of postings closed within
  1. 2.1%1 day
  2. 4.6%3 days
  3. 13.3%7 days
  4. 21.3%14 days
  5. 35.7%30 days
  6. 59.1%60 days
This job: posted 7 hours ago

The posting

Atheer CT is a Saudi deep-tech company developing carrier-grade 60 GHz wireless infrastructure for high-throughput, low-latency connectivity. We build advanced hardware that supports demanding telecommunications use cases, with a focus on performance, reliability, and production readiness. This is an opportunity to contribute to sophisticated networking and wireless products in an environment where hardware excellence has a direct impact on product success.

In this role, you will take ownership of complex electrical hardware development for advanced networking and wireless systems. You will help shape robust, high-performance board designs, working across architecture, implementation, validation, and release while partnering closely with internal engineering teams and external manufacturing stakeholders to bring products from concept into volume production.

Responsibilities

  • Lead the design and development of advanced networking and wireless hardware products across the full hardware lifecycle, from architecture and schematic design through validation, manufacturing, and production release.
  • Design complex multilayer and HDI PCBs, define stack-ups, and develop mixed RF/digital layouts.
  • Perform signal integrity and power integrity analysis using industry-standard simulation tools.
  • Support EMC/ESD compliance and implement DFM/DFT practices.
  • Design PoE and DC-DC power systems, including power sequencing.
  • Collaborate with engineering teams and external ODM/EMS manufacturing partners.
  • Take products from prototype through mass production.

Requirements

Required Qualifications

  • 8+ years of hardware design experience in networking, telecom, or wireless products such as routers, access points, outdoor radios, or small cells, including experience bringing products from prototype through mass production.
  • Strong background in high-speed digital design for networking hardware, including PCIe, DDR3/DDR4, 10GbE, SGMII/USXGMII, SerDes interfaces, and hardware operating at 1GbE, 10GbE, or higher data rates.
  • Hands-on experience with PCB design, signal integrity and power integrity analysis, hardware validation, and supporting board bring-up, debugging, root cause analysis, and validation testing.
  • High proficiency with Altium Designer or Cadence Allegro for HDI and multilayer PCB design, mixed RF/digital layouts, and stack-up definition.
  • Experience designing PoE systems to IEEE 802.3at/bt, along with DC-DC power design and power sequencing.
  • Familiarity with Ethernet protocols and networking architectures, plus solid knowledge of EMC and ESD compliance requirements for hardware products.
  • Experience applying DFM and DFT practices and supporting EVT, DVT, PVT, and New Product Introduction activities through product release.
  • Experience collaborating with ODM/EMS manufacturing partners during product development and production release.
  • Proficiency with laboratory equipment including oscilloscopes, spectrum analyzers, vector network analyzers, and logic analyzers.
  • Professional fluency in English.

Preferred Qualifications

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • Experience with mmWave RF boards, Wi-Fi technologies, and 60 GHz products.
  • Experience working with low-loss materials such as Rogers laminates.
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