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Open nowPosted today

IC Design Engineer

AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED

Pay
SGD 7,000 – SGD 14,000 a month
Where
North, Singapore
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Your applicationOpen nowIC Design EngineerAVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED · North, Singapore

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13.3% of postings close within 7 days. Measured by our own scanner across the market.

Share of postings closed within
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  2. 4.6%3 days
  3. 13.3%7 days
  4. 21.3%14 days
  5. 35.7%30 days
  6. 59.1%60 days
This job: posted today

The posting

Company Overview

Broadcom Inc. is a global technology leader designing and supplying semiconductor and infrastructure software solutions for data center, networking, software, broadband, wireless, storage, and industrial markets. More at www.broadcom.com.

Job Summary

Join as an R&D engineer to lead and execute physical design implementation of high-performance System-On-Chip ASICs, driving innovation in advanced semiconductor technologies and collaborating across teams to deliver cutting-edge solutions.

Responsibilities

  • Lead teams in the physical design implementation of large ASICs with 500 to 800 million gates to meet project specifications and timelines
  • Provide technical support and manage customer relationships to ensure successful project delivery and customer satisfaction
  • Apply hands-on expertise using leading-edge physical design EDA tools for ASIC design and implementation projects
  • Collaborate with RTL and Physical Design teams to identify and resolve timing violations through design or constraint optimization
  • Utilize commercial and in-house EDA tools to design and implement integrated circuits in advanced 5nm, 3nm, and 2nm process technologies
  • Participate in innovation and development of design flows and methodologies to address challenges in deep submicron ASIC design for computing and networking products
  • Leverage in-depth knowledge of CPU/DSP architecture, algorithms, and physical design implementation to enhance design quality and performance

Required competencies and certifications

  • Degree, Masters, or PhD in Electrical, Electronics, or Computer Engineering with 8+ years of relevant experience
  • Proficiency with VLSI design tools such as Cadence, Synopsys, Mentor, and Ansys for Place & Route, Spice Simulation, DRC/LVS Physical Verification, Static Timing Analysis, and Power Integrity
  • Strong analytical problem-solving skills demonstrated through collaboration in cross-functional teams
  • Experience in scripting languages including Perl, Tcl, and Python

Preferred competencies and qualifications

  • In-depth CPU/DSP architecture and algorithm knowledge with related physical design implementation experience (not mandatory but highly advantageous)

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