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Open nowPosted 23 hours ago

STA/Timing Closure Lead

ChipAgents11 open roles

Where
San Jose
Work mode
On site
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Your applicationOpen nowSTA/Timing Closure LeadChipAgents · San Jose

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The clock on this job

Early applications get read.

12.8% of postings close within 7 days. Measured by our own scanner across the market. ChipAgents postings stay open a median of 52 days.

Share of postings closed within
  1. 2.2%1 day
  2. 4.5%3 days
  3. 12.8%7 days
  4. 20.6%14 days
  5. 35.6%30 days
  6. 58.4%60 days
This job: posted 23 hours ago

ChipAgents median: 52 days open

The posting

ABOUT CHIPAGENTS

ChipAgents is revolutionizing chip design and verification with agentic-AI workflows. Founded by experts in AI and semiconductor design, we partner with top-10 semiconductor companies, hyperscale cloud providers, and cutting-edge startups. Our platform accelerates RTL development, functional verification, and simulation, unlocking new levels of productivity and design quality.

ROLE OVERVIEW

We’re hiring an STA/Timing ClosureLead to develop solutions for closing timing on multi-billion instance ICs and 3D ICsYou’ll work with R&D to define the product architecture and refine the solution at our customer sites.

KEY RESPONSIBILITIES

- Design our approach to timing closure for very large designs and 3D ICs with the R&D team.

- Run backend and timing flows with customers and use what you learn to improve the product.

- Share customer feedback with research and product teams to help set priorities.

- Act as our in house expert on STA and timing closure.

QUALIFICATIONS

- BS or MS in Electrical Engineering, Computer Engineering, or a related field.

- 10+ years running STA and timing closure at a tier 1 design houses.

- Experience closing timing at advanced process nodes.

- Strong hands on experience with commercial synthesis and timing tools such as Design Compiler and Fusion Compiler.

- Deep knowledge of STA, Liberty formats, and device characterization.

- Background in device physics at advanced nodes.

- Experience with die to die or chiplet to chiplet timing closure.

- Experience closing timing on 3D ICs, including TSV design and interconnect timing.

- Interest in working directly with customers and shaping the product.

NICE TO HAVES

- Experience with the broader implementation flow, including place and route.

- Experience using AI coding agents such as Claude Code, Codex, or OpenCode.

- Scripting experience in Python, Tcl, or Makefiles.

WHY CHIPAGENTS

- Use your timing expertise to build AI tools for some of the largest chips being designed today.

- Work with a strong technical team and an advisory board of EDA veterans, with a product already used by real customers.

EQUAL OPPORTUNITY

ChipAgents is an equal opportunity employer. We welcome applicants of all backgrounds.

WHAT WE OFFER

- $180K/yr – $350K/yr base salary + equity. Open to above-scale compensation for exceptional candidates.

- Unlimited PTO and full benefits (medical, vision, dental, 401k).

- Two engineering-centric offices with free parking, private gym, and free lunch, drinks and snacks.

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