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Signal/Power Integrity Hardware Engineer (Onsite)

Cisco1,117 open roles

Where
San Jose, California, US
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Your applicationOpen nowSignal/Power Integrity Hardware Engineer (Onsite)Cisco · San Jose, California, US
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The clock on this job

Early applications get read.

8.1% of postings close within 7 days. Measured by our own scanner across the market. Cisco postings stay open a median of 28 days.

Share of postings closed within
  1. 1.7%1 day
  2. 3.6%3 days
  3. 8.1%7 days
  4. 15.1%14 days
  5. 34.0%30 days
This job: posted yesterday

Cisco median: 28 days open

The posting

The application window is expected to close on: 10/18/2026

This position requires that you commute to our San Jose, CA office 5 days per week.

Meet the Team

Cisco Silicon One (#CiscoSiliconOne) is a business organization with a long track record of building complex and high-performance Silicon ASICs. Our silicon devices drive the world’s most complex networks and carry over 90% of IP traffic. Cisco Silicon One is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio.

We are a highly specialized ASIC team with experts in all aspects of advanced IC package design and heterogeneous system integration. Our substrates use the latest 2.5D fanout technologies for large-scale integration, using the latest signaling and data transfer technologies. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry!

The Cisco UCS SI team is seeking a Signal Integrity Testing and Validation Engineer for the design and analysis of high-speed interconnects and power distribution networks. As a member of the UCS SI team, you will help test the next generations of Intel, AMD based Compute Servers for Cisco Blade products. You will be working in a larger team, collaborating closely with Design Hardware Engineers, ECAD, Mechanical, Thermal, Manufacturing, and versatile and knowledgeable SI/PI engineers in the creation of next-generation Compute Server and AI Server products.

Your Impact

  • Assist in the system level laboratory validation and analysis of high-speed digital and analog systems
  • Using scripting and programming or automating the measurements, analysis, and utilizing AI tools to optimize post-processing data.
  • Lab management skills managing probes, scopes, terminations, and cables
  • Manage Licensing and maintaining Simulation Servers based on Windows or Linux systems
  • Support prototype function bring-up, and system-level validation and troubleshooting.
  • Collaborate with hardware, layout, and validation teams to resolve technical issues.
  • Contribute to documentation, data analysis, and correlation of simulation and lab measurements.
  • Participate in technical discussions with guidance from senior team members.
  • Support signal integrity simulations using industry-standard tools

Minimum Qualifications

  • Bachelors in Electrical Engineering or related field with 2+ years of related experience, or Masters in Electrical Engineering or related field + 0 years of related experience.
  • Core Expertise: 3+ years of experience in hardware design or signal integrity, backed by a foundation in transmission line theory and high-speed circuit principles.
  • Design & Simulation: Experience with PCB layout using Cadence Allegro and capable of utilizing simulation tools like SPICE and 2D/3D field solvers (HFSS, Power SI), etc.
  • Lab Proficiency: Hands-on experience with high-speed characterization using lab equipment such as oscilloscopes, TDRs, and VNAs.
  • Programming Skills: Experience in automating tasks and analyzing data through Python or Matlab scripting.

Preferred Qualifications

  • Effective teamwork and communication skills.
  • Motivation to learn and solve technical challenges.
  • Coursework or project experience in signal integrity, power noise analysis, or related fields.
  • Working experience with high-speed DDR PCIe links, NRZ and PAM4 SerDes, as well as high-speed PCB/package development and PI analysis, is a plus.
  • Experience with using or developing AI based tools
  • Experience with HSPICE, ADS, MATLAB, Cadence PowerSI AC/DC, Allegro.
  • Exposure to high-speed interface technologies (e.g., SerDes, LVDS, CML).

Why Cisco?

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.

We are Cisco, and our power starts with you.

Message to applicants applying to work in the U.S. and/or Canada:

The starting salary range posted for this position is $112,200.00 to $162,200.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.

Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.

U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:

  • 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
  • 1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
  • Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
  • Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)
  • 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next
  • Additional paid time away may be requested to deal with critical or emergency issues for family members
  • Optional 10 paid days per full calendar year to volunteer

For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.

Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:

  • .75% of incentive target for each 1% of revenue attainment up to 50% of quota;
  • 1.5% of incentive target for each 1% of attainment between 50% and 75%;
  • 1% of incentive target for each 1% of attainment between 75% and 100%; and
  • Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

The applicable full salary ranges for this position, by specific state, are listed below:

New York City Metro Area:

$112,200.00 - $186,500.00

Non-Metro New York state & Washington state:

$108,400.00 - $164,500.00

* For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.

** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

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