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Open nowPosted 36 hours ago

Software Technical Program Manager

Efficient Computer19 open roles

Where
Austin, TX, Pittsburgh, PA, San Francisco, California, United States
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Your applicationOpen nowSoftware Technical Program ManagerEfficient Computer · Austin, TX, Pittsburgh, PA, San Francisco, California, United States

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The clock on this job

Early applications get read.

7.8% of postings close within 7 days. Measured by our own scanner across the market. Efficient Computer postings stay open a median of 40 days.

Share of postings closed within
  1. 1.6%1 day
  2. 3.4%3 days
  3. 7.8%7 days
  4. 14.3%14 days
  5. 33.7%30 days
This job: posted 36 hours ago

Efficient Computer median: 40 days open

The posting

Efficient Computer is rethinking computing from the ground up to solve one of AI's biggest challenges: energy. Our Fabric architecture delivers a 10–100x improvement in energy efficiency for general-purpose computation, including AI, while supporting familiar programming languages and software frameworks—unlocking new possibilities for autonomous machines, intelligent infrastructure, wearables, and space systems. With our first processor, Electron E1, now shipping in volume and more than $97 million in Series B financing recently announced, we're accelerating customer deployments and scaling our architecture to data center performance. Join us to build the hardware and software that bring intelligence wherever it's needed and help shape the next generation of computing.

Efficient Computer is building the next generation of super-efficient, general-purpose processors around the Fabric architecture, a novel spatial dataflow design. The Fabric is only as useful as the software that targets it: the effcc compiler, the system software stack (optimization libraries such as eff-dsp and, over time, the runtime), and the SDK that customers build on.

We are looking for a Software Technical Program Manager to own the quarterly release of this software, from scoping and commitment through code freeze, qualification, and ship. You will be the operational center of the software program: building and defending the release plan, driving the critical path, holding the quality bar, and making tradeoff conversations happen before something slips. You will work daily with the compiler, system software, embedded, and product teams, and regularly interface with architecture and hardware teams especially when it comes time to bring-up new silicon.

Key Responsibilities

Own the Release

  • Own the execution of the quarterly software release from planning through ship: the schedule, critical path, and delivery. Product defines what ships and why, Engineering determines what is feasible, and you are accountable for when and how it lands. Each release bundles the SDK, the effcc compiler, optimized software libraries, and eventually the runtime.
  • Build the release plan with product managers, team leads, and engineering managers. This includes feature commitments, freeze dates, qualification windows, and ship criteria, informed by Product's customer requirements and the hardware schedule.
  • Drive the weekly execution cadence (release reviews, bug triage, go/no-go) and maintain a single source of truth for status, dependencies, and decisions.

Drive Cross-Functional Execution

  • Coordinate handoffs across the compiler, system software, and embedded teams, and with architecture, product and hardware teams.
  • Keep Product Management informed about execution and raise risks accordingly that could affect the release schedule, quality, or feature-set.
  • Manage the release's dependency chains: e.g. compiler features that libraries depend on, interfaces shared between the SDK and the runtime, LLVM and toolchain versions, board and silicon availability, etc.

Maintain Release Quality

Establish with our teams release quality gates: e.g. no regressions in cycles, energy, or code size on the benchmark suites relative to the previous release; test coverage thresholds met, etc.

  • Run the release checklist (the gates above plus documentation, release notes, etc.), working with the release shepherd to hold owners to closure criteria.

Track escaped defects and feed what we learn back into the checklist.

Manage Risk, Decisions, and Reporting

  • Surface risk early with mitigation options and schedule impact quantified: e.g. late compiler features, coverage shortfalls, and benchmark regressions.
  • Facilitate scope, schedule, and quality tradeoffs, and document what was decided, by whom, and why.
  • Deliver executive reporting: where the release stands, what is at risk, what decision is needed and by when.

Required Qualifications

  • B.S. in Electrical/Computer Engineering, Computer Science, or equivalent; M.S. or MBA a plus.
  • 7+ years in software engineering or program management, including prior hands-on engineering experience in compilers, systems software, or embedded software.
  • Working fluency in using AI-tools to facilitate program management – from reporting, to issue tracking, to dependency analysis and more.
  • Strong experience with the software delivery flow: compiler toolchains, embedded SDKs, CI/CD, test coverage, performance benchmarking, and release engineering.
  • Demonstrated ability to build and defend a bottoms-up schedule with critical path analysis and dependency mapping.
  • Track record influencing without authority: earning the technical credibility to push senior engineers on commitments and dates.
  • Strong written and verbal communication; able to run a room of principal engineers and an executive review with equal effectiveness.
  • Hands-on with program tooling: Github, Linear, Jira, Notion, Confluence, CI systems, etc.

Desired Qualifications & Experience Requirements

  • Experience as the technical program manager on a first-generation silicon product, where the toolchain and hardware matured together.
  • Familiarity with LLVM or MLIR, machine learning compilers, or language runtimes.
  • Knowledge of dataflow, spatial, or other novel compute architectures.
  • Experience managing pre-silicon software enablement against emulation or FPGA prototyping programs.

We offer a competitive base salary for this role, generally ranging from $200,000 to $260,000, plus a 10% annual bonus, meaningful equity, and comprehensive benefits. Final compensation will depend on experience, level, and location, with flexibility for the right candidate.

Why Join Efficient?

Build what's next. At Efficient, you'll tackle big challenges with room to take ownership and make an impact. We back you with competitive pay, equity, a 401(k) match, company-paid benefits, paid parental leave, and flexibility—plus opportunities to grow your skills and career as we scale.

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