The posting
In most instances, this position requires in-person interviews as part of the hiring process.
Minimum qualifications:
- Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, a related technical field, or equivalent practical experience.
- 5 years of software engineering (e.g., C++ and Python).
- Experience with computer architecture concepts (memory hierarchies, roofline models, bandwidth versus compute bottlenecks, network topologies).
- Experience with software design for simulation, performance modeling, or scientific computing.
Preferred qualifications:
- Master's degree or PhD in Computer Science, or a related technical field.
- Experience designing LLM-based agentic orchestration loops (e.g., autonomous tool calling, multi-turn reasoning, self-correcting execution) or applying AI to automated software engineering, hardware/compiler optimization, or simulation workflows.
- Experience with performance profiling tools, analytical roofline modeling, or architectural simulators.
- Knowledge of modern transformer architectures (Dense and MoE, long-context attention, speculative decoding) and distributed execution paradigms (SPMD, pipeline, tensor, and expert parallelism) across modern ML frameworks (e.g., JAX, PyTorch/XLA, or Pallas).
- Ability to bridge high-level model specifications with low-level hardware constraints (interconnect latency, SRAM caching, DMA scheduling).
About the job
Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Google’s needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.
As a Software Engineer on the Performance Simulation team, you will design and develop simulation software and AI-driven platforms that model how AI workloads (e.g., Gemini, MoE thinking/reasoning models, long-context serving) execute on applicant hardware architectures.
Operating at the critical boundary between frontier ML models and future accelerator roadmaps, you will build and automate cycle-level and analytical performance estimators to project throughput, latency SLOs, and Perf/TCO across different silicon configurations (SRAM/HBM hierarchies, multi-dimensional ICI interconnects, optical switching, and specialized compute engines like SparseCore). You will integrate LLM-driven agentic workflows to automate sweep generation, parameter exploration, data retrieval, and bottleneck diagnosis—accelerating hardware/software decisions.
Google Research is building the next generation of intelligent systems for all Google products. To achieve this, we’re working on projects that utilize the latest computer science techniques developed by skilled software developers and research scientists. Google Research teams collaborate closely with other teams across Google, maintaining the flexibility and versatility required to adapt new projects and foci that meet the demands of the world's fast-paced business needs.
Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
US: $174000 - $252000 (USD) + 15% bonus target + equity + benefits
Learn more about benefits at Google.
Responsibilities
- Design, build, and maintain scalable performance simulation frameworks to accurately evaluate training and serving metrics for next-generation TPU configurations.
- Model how future model architectures (e.g., Mixture-of-Experts, multi-head latent attention, hybrid sequence parallelism, sparse attention, and KV-cache compression) interact with architectural variables (e.g., SRAM capacity/bandwidth, HBM contention, ICI network topologies, and live failover mechanisms).
- Develop and integrate AI-agentic platforms and toolchains to automate simulator sweep setup, parameter sensitivity analyses, and data extraction over gigabytes of simulation sweeps—reducing analysis cycles from weeks to hours.
- Build analytical and optimization engines (e.g., Mixed-Integer Programming/MIP, simulated annealing, roofline estimation) to identify Pareto-optimal execution strategies (sharding, tensor placement, weight pinning, prefetching).
- Formulate clear, data-grounded performance projections and comparative studies (e.g., Iso-execution analysis, trade-off studies between compute density versus memory bandwidth) to inform multi-year TPU platform roadmaps and hardware contracts.
