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Open nowFirst seen 2 hours ago

Staff CPU Architecture and Performance Architect

Google3,180 open roles

Where
Mountain View, CA, USA; Austin, TX, USA; Poughkeepsie, NY, USA
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Your applicationOpen nowStaff CPU Architecture and Performance ArchitectGoogle · Mountain View, CA, USA; Austin, TX, USA; Poughkeepsie, NY, USA

  1. YouYes, apply to this one.

  2. CV RocketCV written for this posting.

  3. 25 readersRecruiter, hiring manager, skeptic. Round after round.

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The clock on this job

Early applications get read.

13.3% of postings close within 7 days. Measured by our own scanner across the market. Google postings stay open a median of 29 days.

Share of postings closed within
  1. 2.1%1 day
  2. 4.6%3 days
  3. 13.3%7 days
  4. 21.3%14 days
  5. 35.7%30 days
  6. 59.1%60 days
This job: first seen 2 hours ago

Google median: 29 days open

The posting

In most instances, this position requires in-person interviews as part of the hiring process. Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Mountain View, CA, USA; Austin, TX, USA; Poughkeepsie, NY, USA.

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
  • 10 years of experience with CPU architecture and performance modeling.
  • Experience in performance modeling, performance analysis, and workload characterization.
  • Experience with computer architecture, microarchitecture, and digital design concepts.
  • Experience in product management, defining, and developing X86 or ARM processors.

Preferred qualifications:

  • PhD degree in Electrical Engineering, Computer Engineering, or Computer Science, emphasizing on computer architecture or machine learning.
  • 12 years of experience with microprocessor architecture, microarchitecture, performance, and design.
  • Experience leading CPU and SoC performance model development, performance analysis, performance correlation, and workload characterization.
  • Experience with processor instruction set architecture (e.g., ARM, RISC-V, x86).
  • Experience with system software components, such as Linux, drivers, and runtime.
  • Experience in chip design.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

As a CPU architecture and performance architect, you'll be the key contributor to improve processor instruction set architecture, to develop innovative microarchitecture features, and to deliver Google’s advanced SoC products. You’ll have the opportunity to collaborate with talents in system performance and software teams to plan and conduct application and benchmark performance analysis and to project their performance at various design phases. Leveraging your CPU-specific knowledge and leadership, you’ll be guiding junior CPU architects and working with engineers in power, thermal, security, physical design and other subsystem teams to determine the CPU subsystem configuration and features, and to support the integration of CPU subsystem into the SoCs.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $192000 - $278000 (USD) + 20% bonus target + equity + benefits

Learn more about benefits at Google.

Responsibilities

  • Plan and evaluate CPU architecture features from both architecture and performance angles.
  • Develop a performance model for performance analysis and microarchitecture design study.
  • Drive performance correlation between the performance model and RTL implementation, including micro-benchmark development and pre-silicon performance correlation, and post-silicon performance analysis and debugging.
  • Collaborate with other teams, such as RTL design, design verification, and physical design, to develop a high performance and efficient CPU implementation.
  • Architect chips or chip-subsystems by analyzing data, writing specifications, coordinating, and negotiating with stakeholders, and creating solutions.
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