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Open nowPosted 440 days ago

Director of Analog Design – Wearable SoCs (On-site. West Lafayette, USA)

Ixana24 open roles

Pay
$175,000 – $225,000 a yearly
Where
West Lafayette, IN
Work mode
On site
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Your applicationOpen nowDirector of Analog Design – Wearable SoCs (On-site. West Lafayette, USA)Ixana · West Lafayette, IN
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This job: posted 440 days ago

The posting

Build the silicon that powers the next era of human-computer interaction | Director of Analog Design - Wearable SoCs

On‑site – West Lafayette, IN | Competitive Salary + Equity + Bonus

We provide relocation packages and visa transfers (if required) for engineers currently in the San Francisco Bay Area and other U.S. hubs.

About Ixana

Ixana is a Purdue University spinoff pioneering brain-inspired wearable computing. We've developed Wi-R, a patented communication tech that's 100x more energy-efficient than Bluetooth or Wi-Fi. Join our 60-person team building the next era of real-time, AI-powered human-computer interaction.

The Wi-R Revolution

Wi-R is our patented non-radiative near-field communication technology that creates secure "wire-like wireless" experiences through small E-field bubbles around your body. This breakthrough enables unprecedented energy efficiency at sub-0.1 nanojoules per bit, making long-term wearable and implantable devices finally practical.

See Wi-R in action: Visit ixana.ai for demos of high-speed data streaming through skin contact: https://vimeo.com/ixana/pairing-contact-transfer

What You’ll Do

  • Architect next-generation Wi-R SoCs, integrating analog/RF front-end, ultra-low-power digital blocks, and sensor interfaces
  • Build and lead the IC design team (digital, analog, mixed-signal) across West Lafayette and remote sites
  • Own chip tape-outs end to end: RTL-to-GDS, IP integration, ESD, packaging co-design, and silicon validation
  • Define and enforce methodologies for IP reuse, verification, and simulation
  • Partner with product, firmware, and hardware teams to co-optimize system design
  • Be the technical face of silicon for investors, partners, and customers

What we are looking for

  • 15+ years experience in ASIC or SoC design, with at least 3 successful tape-outs in mixed-signal or RF-heavy products
  • Proven success leading teams through spec → tape-out → bring-up → production
  • Deep experience in low-power wireless SoCs, including Bluetooth, NFC, UWB, or proprietary PHYs
  • Proficiency in Cadence toolchains, floorplanning, DFT, timing closure, and analog/digital integration
  • Bonus: Prior work in wearable, bioelectronics, or medical devices

Compensation & Benefits

  • Base salary $175 000 – $225 000 USD ‑ equivalent to ≈ $330k – $430k Bay‑Area purchasing power. 3br houses in Lafayette, IN area are $350k-450K. Top 20 school district in the country.
  • 10-50% cash bonus
  • Meaningful early‑stage equity
  • Relocation bonus, partner job‑search help (All figures based on BestPlaces July 2025 cost-of-living indices. West Lafayette index = 83.5. These reflect real-world purchasing power, not just cash numbers.)
  • Comprehensive health, dental, and vision insurance
  • 401(k) retirement plan
  • 5 days a week in office. Flexible work arrangements and generous PTO
  • Professional development opportunities and conference attendance
  • Patent development and technology leadership opportunities
  • Immigration and work visa support as long as you are already in US on a work permit
  • Full visa sponsorship (STEM‑OPT transfer / H‑1B / TN / future green card)

Why Join Us

  • Work on deep tech that matters
  • Collaborate with world-class experts and industry leaders
  • Own your work end-to-end and see real impact
  • Enjoy a culture of speed, rigor, and respect
  • Competitive perks, equity, and global exposure

Ready to re‑wire the future of human-computer interaction?

Apply via our careers page. In your note, tell us how you envision using Wi‑R to transform everyday experiences across healthcare, industry, or consumer tech.

Ixana is an equal opportunity employer committed to advancing human-computer interfaces through innovative low-power electronics innovation.

Keywords: Analog IC Design, Mixed-Signal SoC, ASIC Development, Low-Power Wireless Systems, RF Front-End Design, SoC Architecture, Tape-Out & Silicon Validation, Cadence EDA Tools, Wearable Electronics, Root Cause Analysis

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