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Open nowPosted today

Digital Implementation Engineer (STA)

MyCareersFuture94,660 open roles

Pay
SGD 8,000 – SGD 13,000 a month
Where
Singapore
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Your applicationOpen nowDigital Implementation Engineer (STA)MyCareersFuture · Singapore

  1. YouYes, apply to this one.

  2. CV RocketCV written for this posting.

  3. 25 readersRecruiter, hiring manager, skeptic. Round after round.

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The clock on this job

Early applications get read.

8.0% of postings close within 7 days. Measured by our own scanner across the market. MyCareersFuture postings stay open a median of 3 days.

Share of postings closed within
  1. 1.6%1 day
  2. 3.5%3 days
  3. 8.0%7 days
  4. 14.9%14 days
  5. 34.0%30 days
This job: posted today

MyCareersFuture median: 3 days open

The posting

Base: Central Singapore

Key Responsibilities:

  • Develop, maintain, and optimize flows for logic synthesis, formal verification, and STA, ensuring quality, accuracy, and efficiency.
  • Develop and review module-level and full-chip SDC timing constraints with front-end design teams.
  • Execute full-chip STA, identify timing issues, and drive timing closure.
  • Implement timing ECOs and collaborate with front-end and back-end teams to resolve timing-related issues.

Requirements:

  • Bachelor’s degree or above in Electronic Information Engineering, Microelectronics, IC Engineering, AI, or a related field.
  • Strong Verilog and SDC skills, with a solid understanding of synthesis, formal verification, STA, and timing closure.
  • Hands-on experience with EDA tools for synthesis, formal verification, and STA.
  • Proficiency in Tcl, Perl, and Python; strong flow automation skills are a plus.
  • Experience with formal verification debugging, timing ECOs, and full-chip STA is preferred.
  • Familiarity with DFT, including BIST, SCAN, JTAG, and ATPG, is a plus.
  • Strong analytical, problem-solving, communication, and teamwork skills, with a proactive and ownership-driven mindset.

EA License: R1987104

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