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Open nowPosted 2 days ago

Foundation IP Memory Verification Engineer

MyCareersFuture91,045 open roles

Pay
SGD 5,000 – SGD 7,000 a month
Where
North, Singapore
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Your applicationOpen nowFoundation IP Memory Verification EngineerMyCareersFuture · North, Singapore

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The clock on this job

Early applications get read.

7.8% of postings close within 7 days. Measured by our own scanner across the market. MyCareersFuture postings stay open a median of 1 days.

Share of postings closed within
  1. 1.7%1 day
  2. 3.5%3 days
  3. 7.8%7 days
  4. 14.6%14 days
  5. 34.1%30 days
This job: posted 2 days ago

MyCareersFuture median: 1 days open

The posting

We are looking for energetic and passionate design engineers to join our Central Engineering Group and be part of an elite team responsible for the development of foundation IP for AI products including memory compilers, logic cells and custom macros of all types on the bleeding edge of process technology. We have multiple positions at all experience levels.

Available Job Responsibilities

  • Contribute towards Memory Design Validation of all types of custom memory macros and memory compilers
  • Perform functional verification, root cause design discrepancies, and help resolve them
  • Perform signal integrity analysis, identify design weaknesses, and propose possible solutions to address them
  • Perform transistor level simulations to check for any Power Up or Lock up issues and help resolve them
  • Perform EM/IR analysis/simulations and evaluate impact on timing and internal margins
  • Perform transistor level simulations to validate timing and internal margins, identify timing characterization holes, and help resolve them
  • Perform various QA and validation checks to ensure accurate timing and power models
  • Develop scripts to automate verification flow and data analysis
  • Support silicon debugs and correlation to spice models
  • Collaborate with key memory designers to co-develop and improve the memory characterization and validation flow
  • Coordinate with memory design leads, modelling leads, and managers to define and execute on the memory validation plan

Preferred Skills

  • Good understanding of transistor level circuit behavior and device physics
  • Good understanding of signal integrity analysis, EM/IR analysis, and reliability analysis
  • Proficiency in running simulators, writing automation scripts, and are tools savvy
  • Understanding of memory behavioral and physical models is a plus
  • Expertise in memory circuit design is a plus
  • Understanding of DFT schemes and chip level integration is a plus
  • Good communication, interpersonal, and leadership skills
  • Motivated, self-driven and good at multi-tasking
  • Passion for solving complex problems and willingness to learn

Qualifications

Bachelor Electronics or computer engineering graduates with minimum 5 years of memory circuit related experience

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