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Open nowFirst seen 15 hours ago

Verification Engineer

nextsilicon/18.00727 open roles

Where
Israel
Work mode
Hybrid
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Your applicationOpen nowVerification Engineernextsilicon/18.007 · Israel

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The clock on this job

Early applications get read.

11.9% of postings close within 7 days. Measured by our own scanner across the market. nextsilicon/18.007 postings stay open a median of 1 days.

Share of postings closed within
  1. 2.1%1 day
  2. 4.4%3 days
  3. 11.9%7 days
  4. 18.6%14 days
  5. 35.6%30 days
  6. 45.1%60 days
This job: first seen 15 hours ago

nextsilicon/18.007 median: 1 days open

The posting

NextSilicon is reimagining high-performance computing (HPC & AI). Our accelerated compute solutions leverage intelligent adaptive algorithms to vastly accelerate supercomputers, driving them forward into a new generation. We have developed a novel software-defined hardware architecture that is achieving significant advancements in both the HPC and AI domains.

At NextSilicon, everything we do is guided by three core values:

  • Professionalism: We get exceptional results through professionalism and unwavering dedication to quality and performance.
  • Unity: Collaboration is key to success; we foster a work environment where every employee feels valued and heard.
  • Impact: We're passionate about developing technologies that make a meaningful impact on industries, communities, and individuals worldwide.

We are looking for a talented and experienced engineer to take part in the verification efforts for the company’s core product. This position involves building a complex verification environment from scratch, and defining and executing a test plan. In this role, you will be leading verification from A to Z and will have a critical impact on the company.

Requirements

  • 6+ years of verification experience, including hands-on experience building complex environments from scratch
  • Advanced knowledge of verification flow, SOC architecture and design
  • Expertise in verification languages such as SystemVerilog, UVM, Spaceman
  • Knowledge of industry standard tools, including Verilog, Verilog simulator, and debug
  • Clear understanding of constrained random verification process, functional coverage, code coverage, and assertion methodology and philosophy
  • Bachelor degree in electrical engineering or computer science, or equivalent experience

Responsibilities

  • Review specifications and develop attributes, tests, and coverage plans
  • Define methodology and test benches
  • Work closely with the verification team to ensure the quality of the product
  • Build and maintain a smart and scalable verification environment that ties into various systems
  • Work with the software, design, and micro-architecture teams to understand the functional and performance goals of the product’s design
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