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Open nowPosted 26 days ago

Senior Digital Design Engineer

nxp66 open roles

Where
Austin (Oakhill, Office)
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Your applicationOpen nowSenior Digital Design Engineernxp · Austin (Oakhill, Office)

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The clock on this job

Early applications get read.

8.0% of postings close within 7 days. Measured by our own scanner across the market. nxp postings stay open a median of 3 days.

Share of postings closed within
  1. 1.6%1 day
  2. 3.6%3 days
  3. 8.0%7 days
  4. 15.0%14 days
  5. 34.1%30 days
This job: posted 26 days ago

nxp median: 3 days open

The posting

Business Unit Description

  • AI Chip Engineering Digital IP team defines and develops components for a wide range of products, including automotive microprocessors, application processors, microcontrollers, and networking. The Austin Digital IP team develops components for DDR, Display Controller, high-speed serial links, cores, memory controllers, and interconnect.

Job Summary:

  • Review IP architecture specifications, features and programming model, microarchitecture and interface specifications.
  • Plan IP documentation and design, including providing schedule assessments.
  • Design IP meeting requirements for quality and performance, using Verilog and System Verilog RTL, and vendor and internal checking tools.
  • Collaborate with verification team to develop test plans and complete verification execution to 100% coverage, and as per NXP standard quality and maturity standards.
  • Deliver completed IP, including RTL design and supporting documentation
  • Track metrics during IP development, include development plan milestones, code and functional coverage, defect tickets, and tracing of requirements versus design specification.
  • Collaborate with cross-functional teams to provide expert support to subsystem, SoC, validation, and applications engineering teams during product development.

Key challenges:

  • Proving design meets all requirements and ensuring zero defects escape to silicon.
  • Meeting committed schedules without compromising quality

Cross-functional aspects:

  • Definition reviews with architecture teams and designers
  • Planning with verification team, architecture team, and project manager
  • Integration of digital IP, working with local and global SoC front-end design teams
  • Support for local customers on IP, subsystem and SoC verification teams, emulation and silicon validation teams
  • Support for applications engineers and end-customers to replicate and identify root cause field failures, and identify workarounds.
  • Collaborate with local and global verification and tools development teams in developing improved methods of verification

Job Qualifications:

  • Minimum BSEE/BSCE/BSCS
  • Minimum 4 years of experience in IP or SoC design
  • Knowledge of SoC architecture required
  • Expert knowledge of Verilog required
  • Experience with design quality checks, including Lint, clock domain crossing (CDC) analysis, static timing analysis (STA)
  • Expert knowledge of ARM AMBA bus protocol standards desired
  • Knowledge of functional safety, including ISO26262 a plus
  • Knowledge of CPU or cache architecture a plus
  • Knowledge of C coding a plus
  • Knowledge of scripting, such as Perl or Python, a plus

More information about NXP in the United States...

NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.

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