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Open nowPosted 95 days ago

Principal / Lead DSP & Systems Architect — Ultra High-Speed SerDes

omnidesigntech56 open roles

Where
Milpitas
Work mode
On site
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Your applicationOpen nowPrincipal / Lead DSP & Systems Architect — Ultra High-Speed SerDesomnidesigntech · Milpitas

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This job: posted 95 days ago

The posting

About the Company

Omni Design Technologies provides high-performance, ultra-low power IP solutions across advanced CMOS nodes, enabling differentiated SoC architectures for AI/ML accelerators, hyperscale datacenter interconnects, optical networks, and next-generation wireline platforms. We partner with market leaders globally and are scaling rapidly, and are seeking senior technical leadership to define the next generation of ultra high-speed SerDes IP at 448G and beyond.

Job Description

We are seeking a Principal / Lead DSP & Systems Architect to own the architectural direction of ultra high-speed SerDes platforms targeting 448G per lane and emerging post-448G standards, spanning both electrical (chip-to-chip, backplane, copper cable) and optical (IM-DD and coherent) interfaces. This individual will drive end-to-end link architecture, DSP algorithm design, and ADC/DAC-based transceiver partitioning, serving as the primary technical interface with strategic customers and standards bodies.

The ideal candidate combines deep expertise in high-speed link theory, advanced equalization and FEC, PAM/multi-level and coherent signaling, and hardware-aware DSP implementation, with a track record of delivering SerDes IP into silicon at the bleeding edge of the wireline and optical roadmap.

Key Responsibilities

Qualifications

  • Graduate degree in EE, Communications, or Signal Processing; PhD strongly preferred.
  • 10+ years in high-speed SerDes or wireline/optical link DSP/systems architecture, with direct exposure to 112G/224G silicon and a clear path into 448G and beyond across electrical and optical interfaces.
  • Proven ownership of end-to-end link budgets with cascaded impairment analysis across channel (electrical and/or optical), AFE, ADC/DAC, DSP, and FEC.
  • Deep expertise in: PAM4/PAM6 and coherent wireline/optical signaling; advanced equalization (FFE, DFE, MLSE/MLSD, Tomlinson-Harashima); optical DSP (CD/PMD compensation, polarization recovery, carrier phase/frequency recovery) for candidates with optical exposure; adaptive algorithms and link training; KP4 and soft-decision FEC; high-speed ADC/DAC architectures (time-interleaved, calibration, ENOB-driven design); CDR and timing recovery at multi-hundred-Gbaud rates; jitter/crosstalk/SI and optical impairment modeling; fixed-point DSP and bit-true modeling; MATLAB/Python link simulation; DSP-to-RTL methodology.
  • Familiarity with OIF CEI (CEI-224G, CEI-448G), IEEE 802.3 high-speed Ethernet, and relevant optical standards (e.g., OIF coherent agreements, IEEE 802.3 optical PHYs).
  • Track record of defining specs consumed by RTL, DSP, mixed-signal, verification, and validation teams.
  • Strong communication skills with VP- and CTO-level stakeholders at hyperscale and module customers.

What We Offer

  • Highly competitive compensation, performance incentives, and substantial technical influence.
  • Direct ownership of DSP and systems architecture for SerDes IP at the bleeding edge of the wireline and optical roadmap.
  • Strategic relationships with top-tier hyperscale, AI, and optical customers.
  • A technical culture that values rigor, clarity, and architectural craftsmanship.
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