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Open nowPosted 26 hours ago

Physical Design Lead

Phinity Labs4 open roles

Where
San Francisco
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On site
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Your applicationOpen nowPhysical Design LeadPhinity Labs · San Francisco
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The clock on this job

Early applications get read.

8.2% of postings close within 7 days. Measured by our own scanner across the market. Phinity Labs postings stay open a median of 14 days.

Share of postings closed within
  1. 1.9%1 day
  2. 3.8%3 days
  3. 8.2%7 days
  4. 15.2%14 days
  5. 34.1%30 days
This job: posted 26 hours ago

Phinity Labs median: 14 days open

The posting

Phinity is an AI research lab focused on solving chip design. The bottleneck to AGI is compute, and we enable AI agents to tape-out chips autonomously, from architecture to post-silicon. We are building RL environments, agent infrastructure, and evaluation systems to accomplish this. Our team brings together deep AI and silicon expertise, including leaders and executives from top chip companies, post-training chip-design models at NVIDIA, AI for formal verification research, previous exits, and over 10 years of experience building chips at NVIDIA, Intel, Mediatek, and others.

We are hiring a Physical Design Lead.

You will be responsible for:

- Leading PD flows and optimization of block-level to full-chip level optimizations

- Define Synthesis to layout flows, including PDN, clock-trees, PVT corners and custom cell definitions. Responsible for implementing characterization flows for custom cells and memory blocks.

- Responsible for executing IP and Fullchip design optimizations working with PD engineers. Identify areas of optimization in design utilization, power grid and clock network within the design.

- Responsible for delivering tapeout ready design optimized for the target PPA, and utilizing the in-house capability on prompt-to-GDS.

Why Phinity

- Work directly with the founders to shape the strategy and growth of an ambitious AI research lab

- Take ownership of high-impact initiatives across business strategy, partnerships, and company operations

- Collaborate with leading AI researchers and hardware experts at the frontier of autonomous chip design

Benefits include

- Health insurance

- Retirement plans

- Unlimited PTO

- Paid parental leave

- Lunch and dinner provided in-office

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