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Open nowPosted yesterday

Sr RF Electromagnetic (EM) Engineer

Qualcomm2,005 open roles

Pay
$133,900 – $200,900 a year
Where
San Diego, California, United States of America
Work mode
On site
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Your applicationOpen nowSr RF Electromagnetic (EM) EngineerQualcomm · San Diego, California, United States of America

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The clock on this job

Early applications get read.

13.3% of postings close within 7 days. Measured by our own scanner across the market. Qualcomm postings stay open a median of 21 days.

Share of postings closed within
  1. 2.1%1 day
  2. 4.6%3 days
  3. 13.3%7 days
  4. 21.3%14 days
  5. 35.7%30 days
  6. 59.1%60 days
This job: posted yesterday

Qualcomm median: 21 days open

The posting

## Company:

Qualcomm Technologies, Inc.

Job Area

Engineering Group, Engineering Group > Packaging Engineering

General Summary:

As a Qualcomm Package System Design and Technology Engineer, you will drive new advanced package technology development, concept design architecture analysis from package to system, new generation product package structure selection, package system design by multi-physics simulation analysis, multi-physics lab validation/correlation of package to system models, and the manufacturing qualification for new product introduction (NPI). Package System Design and Technology Engineers collaborate with multi-disciplinary teams to achieve optimized performance of mechanical, electrical, and thermal package systems for various end market applications. This role interfaces with internal/external IP teams, industry standards, and vendors to set package to system design and technology specifications; enabling product designs to achieve high performance, high reliability, low cost, and easy to implement system with integrated component attaches for end customers.

Minimum Qualifications:

• Bachelor's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 2+ years of System/Package Design/Technology Engineering or related work experience. OR Master's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 1+ year of System/Package Design/Technology Engineering or related work experience. OR PhD in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field.

Preferred Qualifications:

• Master's Degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field.

• 3+ years of System/Package Design/Technology Engineering or related work experience.

Principal Duties and Responsibilities:

• Applies Package System Design and Technology knowledge to drive package product design layout, design multi-physics optimizations, design verification (DV), design tool flow development and tape out of discrete package or Module/SiP for all forms of bare silicon products (single or multi-die).

• Assists package to system cooling architecture through simulations; assists in silicon and package product tapeouts, ensuring the thermal package system meets targeted performance, quality, reliability, and cost targets.

• Performs package to system electrical analysis and simulations for digital IP, analog IP and external components; supports SIPI, analog and PDN solution development across SoC, substrate, interposer, components and system platforms; assists in package to system tapeout preparation to meet electrical performance, quality, reliability, and cost goals.

• Simulates package mechanical interactions to optimize design, materials, reliability, etc. and improve product development efficiency.

• Performs empirical testing on materials and devices, characterize mechanical/electrical performance, and analyze board/system level interactions.

• Develops and implements packaging technology solutions for various end market applications to meet performance and cost targets.

• Develops (structure/process/material/DRM), evaluates, and qualifies next-generation substrate technologies used in semiconductor packaging.

• Develops and integrates next-generation heterogeneous integration solutions, including substrate, bridge die and interposer 2.5D chiplet architectures.

• Develops and optimizes 3D integration technologies, including die-to-wafer, die-to-die, and wafer-to-wafer stacking for STCO, enables high-density interconnects, and implements design rules to ensure reliable and high yield die stacking technology.

• Collaborates with team members to accomplish goals while meeting quality expectations.

Level of Responsibility:

  • Works under supervision.
  • Decision-making may affect work beyond immediate work group.
  • Requires verbal and written communication skills to convey information. May require basic negotiation, influence, tact, etc.

• Has a moderate amount of influence over key organizational decisions.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [email protected] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.

EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range and Other Compensation & Benefits:

$133,900.00 - $200,900.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.

If you would like more information about this role, please contact Qualcomm Careers.

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