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Open nowFirst seen 72 days ago

Sr. Staff Digital Engineer

Semtech87 open roles

Where
IND - Hyderabad
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Your applicationOpen nowSr. Staff Digital EngineerSemtech · IND - Hyderabad

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The clock on this job

Early applications get read.

12.7% of postings close within 7 days. Measured by our own scanner across the market. Semtech postings stay open a median of 42 days.

Share of postings closed within
  1. 2.2%1 day
  2. 4.5%3 days
  3. 12.7%7 days
  4. 20.4%14 days
  5. 35.6%30 days
  6. 58.7%60 days
This job: first seen 72 days ago

Semtech median: 42 days open

The posting

Responsibilities:

  • Define, develop, verify and optimize complex digital circuits for low-power mixed-signal circuits. Design digital hardware functions and sub/full systems in RTL code using SystemVerilog, Verilog or VHDL. Collaborate with system design to create digital specification definition. Implement design for testability (scan chain, BIST, boundary scan) and diagnosis features to support hardware testing. Generate technical documentation and drive design reviews. (40%)
  • Define constraints, perform logic synthesis, implement or supervise physical design for timing closure, perform DFT insertion and create test vectors, perform static timing closure. (10%)
  • Support development of comprehensive verification plans and testbenches, including functional verification, RTL and gate-level simulations, timing analysis, and top verification. Define and implement pre-silicon digital hardware emulation and FPGA prototyping. (20%)
  • Support silicon lab evaluation, performance characterization and debug. (10%)
  • Interface with system, embedded firmware, analog, verification and cross functional teams. (10%)
  • Technical support to test, product and application engineers. (10%)

Minimum Qualifications:

  • 10+ years of industry experience in digital integrated circuit design
  • B.S. or M.S. in Electrical or Computer Engineering
  • Strong analytical, synthesis and problem solving skills
  • In-depth knowledge and experience in digital IC development for mixed-signal ICs, frontend-to-backend flow, timing closure, HW-SW architectures and co-design, data path, signal processing, low-power techniques, constraints development, timing analysis, system trade-offs (power, speed, hardware resources, area)
  • Strong background with MCU based hardware systems (ARM, RISC-V, PIC, STM32) with memories, digital micro-architecture, interfaces, and dedicated hardware peripherals
  • Proficiency in SystemVerilog/Verilog/VHDL, scripting languages (Python, Perl, tcl), debugging capabilities, and industry leading digital EDA tools (Synopsys, Cadence, Siemens)
  • Knowledge of verification methodologies and tools (SystemVerilog, UVM/OVM, formal verification)
  • Demonstration of technical leadership and innovation
  • Experience with standard hardware protocols (I2C, I3C, SPI, MIPI)
  • Hands-on experience with development boards, FPGAs, logic analyzers, oscilloscopes, supplies, multimeters and the associated measurement methods
  • Independent, self-motivated, rigorous, innovating, team player and able to follow through
  • Excellent verbal and written communication skills
  • Knowledge of system-level aspects: signal processing, mixed-signal, embedded firmware, analog, modelling, test and application

Desired Qualifications

  • Experience with system design methods & tools, Matlab, etc.
  • Experience with consumer and/or ITA market circuit developments
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