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Open nowPosted 187 days ago

ASIC Engineer | ASIC Implementation Engineer (Synthesis/STA/DFT)

Workable (global search)108,016 open roles

Where
Bengaluru, KA, India
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Your applicationOpen nowASIC Engineer | ASIC Implementation Engineer (Synthesis/STA/DFT)Workable (global search) · Bengaluru, KA, India

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The clock on this job

Early applications get read.

7.9% of postings close within 7 days. Measured by our own scanner across the market. Workable (global search) postings stay open a median of 7 days.

Share of postings closed within
  1. 1.6%1 day
  2. 3.6%3 days
  3. 7.9%7 days
  4. 14.9%14 days
  5. 34.0%30 days
This job: posted 187 days ago

Workable (global search) median: 7 days open

The posting

If you like connecting design intent with silicon reality, this role hits that sweet spot.

  • 5–9 years in ASIC design and implementation
  • Strong experience in Synthesis, STA, DFT, Lint, and CDC
  • Hands-on with timing constraints and closure
  • Experience with Tempus and PrimeTime tools
  • Strong understanding of MMMC, SDF, and GLS support
  • Experience in timing model generation and validation
  • Ability to collaborate with design and SoC teams
  • Strong analytical and debugging skills

If you enjoy solving timing puzzles others avoid, you’ll thrive here.

Requirements

• Working knowledge of Synthesis, DFT, STA, Lint & CDC

• Work closely with design teams to understand the requirements and constraints of the design.

• Write and implement block level and top-level constraints for synthesis and STA.

• Experience of performing STA preferably with both Tempus and Primetime

• STA and Timing closure using MMMC in both functional and DFT modes

• Experience on SDF generation and validation and support to functional verification team during GLS.

• ETM /timing model generation and validation at IP level.

• Working in partnership with SoC teams to support the IP at SoC level.

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