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Open nowPosted 4 days ago

Staff ASIC Validation Engineer

Workable (global search)108,016 open roles

Where
Hyderabad, TS, India
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Your applicationOpen nowStaff ASIC Validation EngineerWorkable (global search) · Hyderabad, TS, India

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Early applications get read.

7.9% of postings close within 7 days. Measured by our own scanner across the market. Workable (global search) postings stay open a median of 7 days.

Share of postings closed within
  1. 1.6%1 day
  2. 3.6%3 days
  3. 7.9%7 days
  4. 14.9%14 days
  5. 34.0%30 days
This job: posted 4 days ago

Workable (global search) median: 7 days open

The posting

This role is for one of Weekday’s clients Salary range: Rs 100000 - Rs 5000000 (ie INR 1 - 50 LPA)

Min Experience: 6+ years Location: Hyderabad JobType: full-time

Requirements

Key Responsibilities:

  • Lead first‑silicon bring‑up, board validation, and early silicon debug.
  • Develop and complete detailed electrical characterization plans covering DC, AC, parametric, and functional measurements.
  • Characterize high‑speed interfaces such as DDR/LPDDR, SerDes, MIPI, UFS, or custom Micron PHYs.
  • Perform post‑silicon electrical characterization of ASIC/SoC/Memory products across process, voltage, and temperature (PVT) corners.
  • Conduct lab measurements using equipment such as Oscilloscopes, BERTs, VNAs, Spectrum analyzers, Waveform generators, and support tools.
  • Involve in Board design activities with team to gather and place custom requirements as per Chaz.
  • Perform signal integrity (SI), power integrity (PI), Jitter, Eye‑diagram, and compliance testing.
  • Debug silicon issues related to timing, noise, stability, margin loss, and functional failures.
  • Analyze failures and recommend design, firmware, or test fixes.
  • Develop Python/MATLAB-based automation for measurements, data collection, and analysis.
  • Process large volumes of lab and silicon data to extract trends, margins, and correlations.
  • Generate concise characterization reports with clear conclusions and recommendations.
  • Work closely with design, pre‑silicon verification, product engineering, firmware, test, and systems teams.
  • Correlate post‑silicon results with simulation and pre‑silicon expectations to identify root causes of gaps.
  • Work closely with Design Team & propose enhancements and design changes to tackle next generation challenges.
  • Contribute to silicon learning documentation and guidelines for comprehensive Chaz activities.

Required Qualifications:

  • 6 to 8 years of Industry experience in High Speed Post Silicon Electrical Characterization Domain
  • Bachelor’s or Master’s degree in Electrical / Electronics or related field.
  • Strong understanding of CMOS fundamentals, analog/digital circuits, and high‑speed interfaces.
  • Hands‑on experience with High-Speed Post‑silicon electrical characterization.
  • Deep knowledge of signal integrity, power integrity, timing analysis, jitter, noise coupling, Channel loss & SerDes.
  • Proficiency in lab equipment operation and debugging methodologies.
  • Experience with scripting and automation (Python preferred).
  • Background in (DDR/LPDDR/PCIe), SerDes, or high‑speed PHY characterization.
  • Familiarity with ATE correlation, compliance specs, and JEDEC/PCI-SIG standards.
  • Experience owning end‑to‑end characterization of a subsystem or interface.
  • Proven track record of silicon issue root‑cause analysis and resolution

Must-have skills

asic, Characterization, Post Silicon Validation

Good-to-have skills

Chaz, Python, PCIe

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