The posting
The Multimedia Lab builds highly efficient, scalable video codec hardware solutions (FPGA and ASIC) from the ground up, serving billions of users. We bring together algorithm, architecture, software, firmware, and hardware design and verification expertise, designing high-performance video silicon IP across ASIC and SoC digital design, verification, and next-generation video codec hardware. Alongside the silicon work, we advance research in video understanding, perceptual quality assessment, image and video enhancement, and intelligent coding, including using multimodal models to improve coding decisions.
Quality, efficiency, and speed rarely improve together. Sharper images and better perceived quality usually cost bitrate, compute, or latency, and a technique that works in research does not always survive production at global scale.
You will take ideas from research through to silicon and production systems, where research decisions show up in the cost and quality of video across ByteDance's products.
About the team Our team is building industry-leading, highly efficient and scalable video codec hardware solutions (FPGA and ASIC) from the ground up to better serve our billions of users. We are looking for strong software and firmware engineers to design algorithms, C-model, and firmware for advanced video encoding and processing implemented in dedicated hardware accelerators. The successful candidate will be part of a fast-growing team that includes algorithm, architecture, software, firmware, and hardware design and verification experts with a dedication to technical excellence and a passion to build large-scale and high-performing video platforms and services.
We are looking for talented individuals to join our team. As a graduate, you will get opportunities to pursue bold ideas, tackle complex challenges, and unlock limitless growth. Successful candidates must be able to commit to an onboarding date by the end of the year. Please state your availability and graduation date clearly in your resume.
Responsibilities: - Design video analysis (ROI, content understanding, feature extraction etc.) and quality assessment algorithms, and participate in database creation, algorithm design/development/optimization, etc. - Participate in designing strategy and solutions for E2E video quality optimization with a combination of video analysis, processing and encoding algorithms, such as frame-level rate control. - Apply designed algorithms for VOD / Live streaming monitoring, data analysis, objective evaluation for algorithms etc. - Collaborate with Infra and multi-media platform teams to integrate algorithms into production workflows and validate their impact through A/B testing.
Minimum Qualification(s) - Individuals who are completing or have recently completed a PhD degree in computer science, electrical engineering, mathematics, statistics or a related discipline. - Excellent programming, debugging, and optimization skills in one or more general-purpose programming languages, including but not limited to: C/C++, Python. - Knowledge of image/video analysis algorithms or subjective/objective image/video quality algorithms, and state-of-the-art technologies, such as VMAF, PSNR, SSIM etc. - Hands-on experience with machine learning or deep learning and familiarity with frameworks such as PyTorch or TensorFlow.
Preferred Qualification(s) - Research and hands-on experience in designing, training, or applying deep learning models, including CNNs, Transformer architectures, and multimodal large language models (MLLMs). - Knowledge of common video processing algorithms, such as super-resolution, diffusion model, etc. - Knowledge of video codecs (AVC, HEVC, AV1, VP9, etc.) and experience in video codec design. - Experience with embedded processors like ARM Cortex M0/M3/M4 or RISC-V architecture, and real-time development in an RTOS environment. - Great communication skills, eager to learn, and always passionate about turning cutting-edge technologies into real-life use cases.
