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Open nowFirst seen 2 days ago

Senior DFT Engineer

comm-it/76.008133 open roles

Where
Poland, Remote
Work mode
Remote
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Your applicationOpen nowSenior DFT Engineercomm-it/76.008 · Poland, Remote
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11.8% of postings close within 7 days. Measured by our own scanner across the market. comm-it/76.008 postings stay open a median of 1 days.

Share of postings closed within
  1. 2.1%1 day
  2. 4.4%3 days
  3. 11.8%7 days
  4. 18.6%14 days
  5. 35.6%30 days
  6. 45.1%60 days
This job: first seen 2 days ago

comm-it/76.008 median: 1 days open

The posting

We are hiring a Senior DFT Engineer in Europe to own Design-for-Test on customer SoCs end-to-end: DFT architecture, scan/ATPG, memory BIST, boundary scan, pattern validation and production test hand-off.

The company provides end-to-end ASIC and COT design and turnkey manufacturing services to fabless companies and OEMs building advanced SoCs. Its offering covers architecture, RTL-to-GDSII implementation, analog/mixed-signal design, and productization through silicon, package, and test. Working across process nodes from 180nm to 2nm, it has completed over 350 tape-outs since 1986

Requirements

Must-Have Requirements:

  • BSc in Electrical Engineering from a recognized university.
  • Minimum 3 years of hands-on DFT experience — must. Senior-level profiles preferred.
  • DFT methodologies: scan, ATPG, at-speed test, memory BIST, I/O DFT.
  • Scan insertion and ATPG for stuck-at, transition-delay, bridging and IDDQ fault models; test-coverage improvement.
  • DFT DRC analysis and coverage debug with Synopsys DFT Compiler / TestMAX (TetraMAX) / SpyGlass DFT or equivalent Siemens (Mentor) Tessent tools.
  • Memory BIST — Tessent MBIST.
  • Strong knowledge of JTAG IEEE 1149.1, IEEE 1149.6 and IEEE 1500 (formerly P1500).
  • Hands-on design and implementation of DFT features.
  • End-to-end DFT flow ownership: concept → tape-out → production.
  • Gate-level simulation setup and runs (pattern validation).
  • Formal equivalence checking.
  • Perl / Tcl / UNIX scripting for flow automation.

Nice to Have

  • Broader Siemens Tessent experience (ScanPro / TestKompress, LBIST) beyond MBIST.
  • Advanced-node experience (7nm and below).
  • Python for flow automation.
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