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Open nowPosted 21 days ago

Senior Device Engineer

MyCareersFuture94,028 open roles

Pay
SGD 5,300 – SGD 10,600 a month
Where
Central, Singapore
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Your applicationOpen nowSenior Device EngineerMyCareersFuture · Central, Singapore

  1. YouYes, apply to this one.

  2. CV RocketCV written for this posting.

  3. 25 readersRecruiter, hiring manager, skeptic. Round after round.

  4. CV RocketApplied on MyCareersFuture's own form.

The reply lands in your private mailbox

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The clock on this job

Early applications get read.

7.7% of postings close within 7 days. Measured by our own scanner across the market.

Share of postings closed within
  1. 1.6%1 day
  2. 3.3%3 days
  3. 7.7%7 days
  4. 14.0%14 days
  5. 33.7%30 days
This job: posted 21 days ago

The posting

Key Reposibilities

  • Monitor and improve Electrical Wafer Sort (EWS) test yield loss for the assigned technology.
  • Analyze and reduce Parametric Testing (PT) and EWS scrap through root cause identification and implementation of containment, corrective, and preventive actions.
  • Manage lots on hold, including inline, T84, and EWS lots, and ensure daily disposition follow-up.
  • Support MQA and Division teams in MRB activities and timely NCL disposition.
  • Assist Process and Module Engineers with electrical data analysis for new tool qualification and production ramp-up.
  • Drive process change qualification when product or process marginality is identified.
  • Work with Product Engineers to optimize sort test programs, specification limits, and statistical bin limits where applicable.
  • Collaborate with Process Engineers and Division teams to improve inline and PT CPK.
  • Support sending plant, Division, RAT, Process Engineers, and Production Control teams in techno and new product transfer qualifications.
  • Apply failure analysis knowledge and perform bench measurements to support root cause analysis.
  • Support defectivity reduction initiatives and Customer Quality Assurance activities for customer incident analysis.
  • Lead ad hoc improvement projects related to yield enhancement, scrap reduction, defectivity reduction, process robustness, process simplification, lot hold improvement, and cost reduction.
  • Liaise with professionals from other functions and ST sites to support team requirements and collaboration.

Requirements

  • Degree in Engineering or a related discipline.
  • Minimum 2 years of experience in semiconductor manufacturing, yield improvement, process engineering, or a related field.
  • Good understanding of semiconductor manufacturing.
  • Familiarity with bench analyzer operation.
  • Basic knowledge of statistics.
  • Strong team collaboration skills.
  • Proficiency in Microsoft Office tools.
  • Experience with Ace-Xp, JMP, or Spotfire is an advantage.
  • Strong command of English, both written and spoken.
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3×

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