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Open nowPosted 24 days ago

Silicon Photonics Chip & System Architecture Engineer

MyCareersFuture94,028 open roles

Pay
SGD 6,000 – SGD 12,000 a month
Where
West, Singapore
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This job: posted 24 days ago

The posting

Silicon Photonics Chip & System Architecture Engineer

Singapore | R&D | Reporting to CTO

About ATI

ATI is a global optical connectivity company developing high-speed connectivity solutions for AI and hyperscale data centre infrastructure. Our portfolio spans high-speed optical transceivers, silicon photonics and advanced optical connectivity technologies supporting the industry's transition toward 800G, 1.6T and future generations of data centre interconnect.

With R&D capabilities across Wuhan Optics Valley, Silicon Valley and Singapore, and manufacturing operations in China and Thailand, ATI brings together photonics, electronics and high-volume manufacturing capabilities to serve leading global technology customers.

We are now building our next-generation R&D team in Singapore, with a focus on silicon photonics and advanced optical interconnect technologies. This is an opportunity to join the team at an early stage and help shape ATI's technology platforms for the next generation of AI infrastructure.

About the Role

This role is responsible for defining the system-level architecture of ATI's next-generation high-speed silicon photonics solutions. You will translate optical module and system requirements into silicon photonic chip architectures, define the optical and electrical interfaces between the PIC and surrounding electronics, and ensure that the overall solution meets performance, interoperability, manufacturability and industry-standard requirements.

The role works at the intersection of silicon photonics, high-speed electrical design and optical module architecture, with particular focus on 800G, 1.6T and future 3.2T optical interconnect platforms.

Core Responsibilities

1. High-Speed Silicon Photonics System Architecture

  • Define system architectures for next-generation 800G, 1.6T and 3.2T silicon photonics solutions, including single-lane 100G/200G/400G PAM4 architectures.
  • Translate product-level requirements into chip-level optical and electrical specifications.
  • Develop and maintain end-to-end link budgets covering key parameters such as optical power, insertion loss, receiver sensitivity, OSNR and BER.
  • Evaluate architecture trade-offs across performance, power consumption, integration, manufacturability and cost.

2. Electrical Interface Definition & Optoelectronic Co-Simulation

  • Define high-speed electrical interface requirements between the silicon photonics PIC and DSP, driver and TIA.
  • Perform or lead electrical/optical co-simulation to assess end-to-end link performance.
  • Identify signal-integrity and bandwidth limitations and work with PIC, IC and module engineering teams to optimize overall system performance.
  • Establish interface specifications and design margins required for robust operation across process, voltage and temperature variations.

3. Standards & Product Architecture

  • Track relevant industry standards and technology roadmaps, including IEEE 802.3, OIF, OSFP, QSFP-DD and applicable MSAs.
  • Ensure silicon photonics architectures are aligned with current and emerging optical interconnect standards.
  • Assess emerging architectures and technologies relevant to future generations of high-speed optical connectivity.

4. Cross-Functional Technical Leadership

  • Work closely with PIC design, electronics, packaging, module engineering, test and manufacturing teams to translate system architecture into manufacturable products.
  • Support design reviews, architecture reviews and technical decision-making throughout the product development lifecycle.
  • Contribute to ATI's technology roadmap for next-generation silicon photonics and optical interconnect platforms.

What We Are Looking For

Education

  • PhD in Optoelectronics, Photonics, Electrical Engineering, Applied Physics or a related discipline.

Technical Competencies

  • Strong understanding of high-speed PAM4 optical communication systems.
  • Proficiency in optical link-budget analysis and modelling of parameters such as OSNR, receiver sensitivity and BER.
  • Good understanding of silicon photonic PIC architectures and key photonic building blocks.
  • Familiarity with high-speed interfaces between PICs, DSPs, drivers and TIAs.
  • Experience with optical/electrical system modelling or co-simulation.
  • Working knowledge of relevant standards including IEEE 802.3, OIF and optical module MSAs/form factors such as OSFP and QSFP-DD.

Experience

  • Hands-on research or industry experience in silicon photonics, high-speed optical communication or optical module architecture.
  • Experience developing architectures for 800G and beyond is highly desirable.
  • Experienced industry candidates and exceptional recent PhD graduates are both encouraged to apply.
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