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1.Front-end Project Management: Oversee the complete lifecycle of front-end ASIC/SoC design and verification projects , from initial architecture definition and RTL coding to simulation, bug tracking, and final design handoff (RTL freeze). 2.Cross-Functional Coordination: Act as the central communication hub for the local engineering teams. Coordinate closely across architecture, RTL design, verification, and physical design (back-end) groups to ensure seamless collaboration and alignment on technical specifications. 3.Schedule & Resource Planning: Develop comprehensive project schedules, define milestones, and allocate resources efficiently within the local team. Monitor daily/weekly progress against baseline plans to ensure timely delivery of design targets. 4.Risk & Issue Management: Proactively identify potential technical bottlenecks and schedule risks. Formulate effective mitigation strategies, drive cross-functional troubleshooting, and escalate critical issues to company management when necessary. 5.Quality & Methodology Assurance: Ensure the local team adheres to industry-standard design and verification methodologies. Monitor key metrics such as verification coverage, bug resolution rates, and design quality to ensure a flawless handoff to the back-end stages. 6.Process Optimization: Continuously evaluate and improve project management processes, workflows, and communication channels to enhance overall R&D efficiency and team productivity.
1.Education: Bachelor’s degree or higher in Microelectronics, Electronic Engineering, Computer Engineering, or a related technical discipline. 2.Industry Experience: 5+ years of experience in the semiconductor IC design industry, with a minimum of 3 years serving in a Project Manager or Technical Lead capacity specifically focused on front-end digital design and verification. 3.Technical Acumen: Strong foundational knowledge of the digital chip design flow. Familiarity with RTL design (Verilog/SystemVerilog), verification methodologies . 4.Project Management Skills: Proven track record of successfully taping out complex SoC or ASIC projects on schedule. PMP, Agile, or Scrum Master certification is highly preferred. 5.Soft Skills: Outstanding leadership and problem-solving abilities. Highly detail-oriented with the capacity to manage multiple tasks under pressure in a dynamic, fast-paced R&D environment. 6.Language: Fluent in both written and spoken English and Mandarin (essential for complex technical discussions and internal engineering alignment). 7.Tools: Highly proficient in project management, collaboration, and bug-tracking tools. Familiarity with version control systemsused in IC design is a plus.



