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Open nowPosted 396 days ago

芯片可靠性工程师（上海/芯片平台） - 芯片研发

ByteDance19,209 open roles

Where
Shanghai, Chinese Mainland
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Your applicationOpen now芯片可靠性工程师（上海/芯片平台） - 芯片研发ByteDance · Shanghai, Chinese Mainland

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The clock on this job

Early applications get read.

12.1% of postings close within 7 days. Measured by our own scanner across the market. ByteDance postings stay open a median of 2 days.

Share of postings closed within
  1. 2.1%1 day
  2. 4.5%3 days
  3. 12.1%7 days
  4. 19.1%14 days
  5. 35.6%30 days
  6. 52.7%60 days
This job: posted 396 days ago

ByteDance median: 2 days open

The posting

团队介绍：芯片平台是一个覆盖从逻辑综合到芯片投片、封装设计与仿真、回片测试、量产全流程的统一化芯片设计平台，提供支持多工艺、多项目的自动化设计流程及设计服务。平台整体划分为硅前、硅后、基础资源管理、IP 定制四大业务板块。 通过硅前 - 硅后全流程覆盖、IP 自主定制、基础资源统一管理的架构，芯片平台实现了从 RTL 到量产的端到端设计能力，支持多晶圆厂、多工艺节点，持续通过自动化提效与质量保障，为公司业务提供坚实的支撑。

1、负责芯片产品的量产导入阶段的可靠性验证，制订可靠性验证方案，跟外部供应商合作按时完成芯片的可靠性验证； 2、跟研发和质量单位合作完成对芯片可靠性指标的评估，以及量产导入各个阶段需要完成的可靠性验证目标； 3、负责搭建量产burn-in等可靠性筛片环境； 4、对于芯片可靠性测试中出现的失效问题进行分析，负责失效分析方案的制订和失效分析报告的编写； 5、参与芯片生产过程中质量问题的解决，及时发现并安排相应的失效分析，制定改善对策，跟进对策实施以及改善效果。

1、大学本科及以上学历，微电子、自动化、电子工程等相关专业优先； 2、至少2-3年芯片设计公司可靠性工作经验； 3、有14nm及以下工艺产品或HBM2.5D/3D先进封装产品的可靠性测试及burn-in经验者优先考虑； 4、熟悉ESD、Latch-Up、HTOL、NBTI、HCI等芯片可靠性测试JEDEC规范和测试方法，熟悉寿命试验相关的DPPM、FIT计算方法，以及SEM、X-Ray、EMMI、SAT等失效分析方法； 5、具备良好的团队合作精神、认真负责的工作态度及沟通能力，英语读写顺畅。

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