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Open nowPosted 82 days ago

芯片物理实现与系统集成工程师(芯片平台) - 芯片研发

ByteDance19,208 open roles

Where
Shanghai, Chinese Mainland
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Your applicationOpen now芯片物理实现与系统集成工程师(芯片平台) - 芯片研发ByteDance · Shanghai, Chinese Mainland
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Early applications get read.

12.1% of postings close within 7 days. Measured by our own scanner across the market. ByteDance postings stay open a median of 2 days.

Share of postings closed within
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  2. 4.5%3 days
  3. 12.1%7 days
  4. 19.1%14 days
  5. 35.6%30 days
  6. 52.7%60 days
This job: posted 82 days ago

ByteDance median: 2 days open

The posting

团队介绍:字节芯片研发团队目前工作主要集中在芯片设计环节,主要围绕字节自身业务展开芯片探索,为字节多项业务的专用场景定制硬件优化,设计多款基于先进半导体工艺的云端复杂芯片,以期提升性能、降低成本。早期若干芯片项目已经进入到量产部署阶段,有多次一版成功的投片经历,所用工艺包含多个主流的先进工艺节点。与基础设施各团队之间工作的整体协同,能更容易和更好地发挥芯片研发的价值。

1、负责ASIC/CPU芯片的中后端设计,涵盖物理设计、DFT、综合STA和封装SIPI等领域相关工作; 2、DFT方向:负责SoC芯片中的DFT实现相关工作,包括Scan、MBIST、ATPG、Boundary Scan等内容,配合上下游团队完成芯片设计过程中DFT相关的Timing/Power-IR分析和收敛等工作,流片后完成向量调试、优化、覆盖率优化等ATE测试相关问题; 3、综合集成方向:与其他团队合作完成SoC芯片Clock/Reset方案、Low Power方案,开发芯片的时序约束与低功耗约束,负责SoC芯片的综合、形式验证、时序分析,推动PPA提升,负责STA signoff、Power/Low Power signoff,优化并推动signoff方法学,负责芯片各类Timing check,成为流片前Timing把关人; 4、封装仿真方向:负责自研芯片全流程封装相关工作,涵盖封装方案选型与定制,完成封装设计并保障交付,开展SI&PI仿真确保信号与电源完整性,进行封装热和应力仿真提前预判并优化散热、可靠性风险,同时负责封装工艺和基板工艺开发,对接上下游厂商保障设计可制造性; 5、物理设计方向:负责先进工艺数字芯片从门级网表到GDSII的芯片后端物理实现全流程,负责PPA优化、芯片STA收敛、物理验证(PV)、IR/EM等芯片后端signoff,具备新技术与流程探索能力,协助开发优化In-house EDA工具与后端设计流程。

1、2027届获得本科及以上学历,计算机/电子/微电子/通信/半导体封装/材料/机械/自动化等相关专业优先; 2、DFT方向:熟练使用DFT EDA工具,掌握DFT原理和方法,具备良好的学习能力、团队合作精神和认真负责的工作态度; 3、综合集成方向: 1)对综合、STA、低功耗等方法学具备一定的知识,有相关项目经验者优先; 2)了解Device和Compact Model,熟悉SPICE Simulation者优先; 4、封装仿真方向:熟练掌握信号完整性及电源完整性的理论知识;熟悉并了解FCBGA、FCCSP、WLCSP、WLBGA、MCM等封装类型的工艺流程和设计要点;理解封装各项性能指标及关键点; 5、物理设计方向: 1)掌握数字电路基础知识,熟练使用主流后端工具,具备一定脚本能力; 2)熟悉并清晰理解后端设计流程及相关概念(Floorplan/CTS/STA等); 3)对先进工艺DTCO方面有深入理解,具备一定AI/EDA方面专业知识(加分项)。

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