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Lead ASIC / Custom Circuit Design Engineer Memory & Mixed-Signal

TalentCloud Group148 open roles

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Your applicationOpen nowLead ASIC / Custom Circuit Design Engineer Memory & Mixed-SignalTalentCloud Group
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  4. 18.1%14 days
  5. 35.6%30 days
  6. 44.6%60 days
This job: first seen 34 hours ago

The posting

Lead Custom / ASIC Design Engineer – Advanced Nodes

Zurich (Hybrid) | Deep Tech | FinFET

We are working with a highly innovative Zürich-based semiconductor company building next-generation compute technology. They are now looking for a Lead Custom Design Engineer to drive the development of high-performance custom circuits on advanced process nodes.

This is a leadership position with strong hands-on responsibility.

If you enjoy owning complex silicon from architecture decisions through to bring-up, and guiding other engineers along the way, this could be a great fit.

Your Role

You will combine technical depth with team leadership.

Expect to:

Lead development of custom digital / analog blocks used in advanced compute architectures

Define circuit-level specifications, performance targets & design strategies

Work hands-on at transistor level across advanced FinFET technologies

Guide a small team of custom & layout engineers toward production-quality silicon

Drive block-level verification, robustness closure & silicon validation

Collaborate closely with digital, backend, DFT & test teams

Review extraction results, debug parasitics, and ensure clean PPA closure

Improve design methodologies, automation flows & review processes

What Youll Bring

7+ years in custom digital, analog, or memory circuit design

Experience owning complex blocks through full development cycles

Strong knowledge of advanced-node behaviour (variation, leakage, stability, reliability)

Prior experience mentoring or technically leading other engineers

Confidence interfacing with layout, backend & system teams

A structured and quality-driven engineering mindset

Nice to Have

Automation scripting (Python or Tcl)

Exposure to memory-related circuits or datapath-heavy designs

Experience in silicon bring-up & correlation

Background in low-power or high-performance compute architectures

Ideal Profile

This role suits someone who:

Still enjoys being hands-on despite seniority

Thinks in terms of performance, power & robustness

Is comfortable making architectural trade-offs

Wants visible impact in a focused, high-caliber hardware team

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